1. Field of the Invention
The present invention relates to a solid-state imaging device and a method of operating a solid-state imaging device.
2. Description of the Related Art
A solid-state imaging device is a semiconductor device which receives light from an imaging target through an optical system such as a lens, photo-electrically converts the contrast of the received light into quantity of electric charges, sequentially reads the charges, and converts the charge quantity into an electric signal. Such a solid-state imaging device has become widespread with the advancement of semiconductor technology. The widely prevalent solid-state imaging device is provided with a CCD (Charge Coupled Device). When the solid-state imaging device generates the electric signal of an image, the CCD transfers the charges detected by photo-detectors to a circuit for converting the charges into the electric signal.
Since the status of the imaging target is various and a user requires a variety of image qualities, it is preferable that the solid-state imaging device provided with the CCD supports a plurality of resolutions. In other words, it is desirable that the solid-state imaging device is capable of switching the resolution. For example, the following conventional techniques are known.
Japanese Laid Open Patent Application JP-P2002-314883A discloses a solid-state imaging device. The solid-state imaging device has a plurality of optical sensors and a charge transfer register. The plurality of optical sensors are aligned on a semiconductor substrate. The charge transfer register is configured to take and transfer charges generated by the optical sensors in response to received lights. The charge transfer register has a plurality of transfer electrode pairs which are formed on the semiconductor substrate and arranged along a charge transfer path at a certain interval. Each transfer electrode pair consists of a first transfer electrode and a second transfer electrode which are adjacent to each other in the direction of the charge transfer path. The same driving pulse is applied to the first transfer electrode and the second transfer electrode. The solid-state imaging device according to the conventional technique further has a first driving circuit and a second driving circuit. Also, the plurality of transfer electrode pairs include a plurality of groups each consisting of successive four transfer electrode pairs. The first driving circuit applies a driving pulse of the same phase to the first transfer electrode pair and the third transfer electrode pair out of the first to the fourth transfer electrode pairs constituting one group of the transfer electrode pairs. On the other hand, the first driving circuit applies a driving pulse whose phase is opposite to that of the driving pulse applied to the first and the third transfer electrode pairs to the second transfer electrode pair and the fourth transfer electrode pair. Thus, the signal charges are transferred along the above-mentioned charge transfer path. The second driving circuit applies driving pulses of opposite phases to the second transfer electrode pair and the third transfer electrode pair immediately after the signal charges are read out from the optical sensors to the charge transfer register. Meanwhile, the driving pulses applied to respective the first transfer electrode pair and the fourth transfer electrode pair are kept to a constant level. As a result, the signal charges below the third transfer electrode pair are moved to below the first transfer electrode pair along the charge transfer path. According to the above-described conventional technique, the switching of the resolution is possible with a small-scale device configuration.
Japanese Laid Open Patent Application JP-P2003-504972A also discloses a solid-state imaging device. In order to obtain a predetermined resolution at the maximum scanning speed, the solid-state imaging device uses an adding means for adding contents of two adjacent pixels.
Japanese Laid Open Patent Application JP-P2001-7312A also discloses a solid-state imaging device. An object of the conventional technique is to change the resolution without changing wire connections with respect to electrodes. The solid-state imaging device according to the conventional technique is provided with a pixel row and a CCD register. The pixel row consists of a plurality of photoelectric conversion units arranged in a line, each photoelectric conversion unit corresponding to each pixel. Each photoelectric conversion unit generates signal charges due to photoelectric conversion. The CCD register is configured to sequentially transfer the generated signal charges in a predetermined direction. In the solid-state imaging device, the CCD register has a plurality of electrode units each of which is formed on a semiconductor substrate through an insulating film. The solid-state imaging device is further provided with an electrode voltage control means that is capable of selecting any of a first mode and a second mode arbitrarily. In the first mode, pulses of plural phases are sequentially applied to the plurality of electrode units, respectively. While in the second mode, the pulses of plural phases are sequentially applied to electrode units that are located across at least one electrode unit. Moreover, in the second mode, a pulse whose width is narrower than that of the pulses of plural phases, or a direct current voltage is applied to each of the at least one electrode unit sandwiched by the electrode units.
Japanese Laid Open Patent Application JP-A-H10-271394 also discloses a solid-state imaging device. The solid-state imaging device has an electrode structure. The electrode structure consists of a first phase electrode pair and a second phase electrode pair. The first phase electrode pair and the second phase electrode pair are alternately and repeatedly arranged on a transfer channel in a transfer direction. The first phase electrode pairs that sandwich the second phase electrode pair are so wired as to be driven independently of each other. The solid-state imaging device is further provided with a means for applying a direct current voltage to the second phase electrode pair and a means for supplying transfer clocks of opposite phases to respective the first phase electrode pairs that sandwich the second phase electrode pair. In the solid-state imaging device, a charge transfer element which can shorten an output period without changing driving frequency is used as a horizontal transfer register. As a result, the output period of one horizontal line can be reduced and hence the frame rate can be increased.
Moreover, Japanese Laid Open Patent Application JP-P2001-244448A discloses a linear image sensor shown in FIG. 1. As shown in FIG. 1, the linear image sensor is provided with a photo-detection unit 101, a high-resolution mode unit and a low-resolution mode unit. The photo-detection unit 101 includes a large number of photodiodes 108 arranged along a direction. The high-resolution mode unit has a first signal charge read unit 102 located on one side of the photo-detection unit 101 and a first signal charge transfer unit 104 consisting of CCD shift registers. The low-resolution mode unit has a second signal charge read unit 103 located on the other side of the photo-detection unit 101 and a second signal charge transfer unit 105 consisting of CCD shift registers. Since the linear image sensor is provided with the low-resolution mode unit, the time required for reading out data at low resolution can be reduced. Also, in the present conventional technique, the increase in the cost of a semiconductor chip is prevented by reducing the number of gate pulse interconnections.
As described above, the conventional solid-state imaging device supports the plurality of resolutions. In the case of the low resolution where not all the pixel data are necessary, the data of adjacent pixels are added or the data are added in a floating diffusion region. Also, an overflow drain may be provided. Unnecessary charges are discharged through the overflow drain, and thereby the number of pixels output can be reduced.
The demand in the current information technology society for speeding-up of processing speed is extending over the solid-state imaging device. According to the conventional solid-state imaging device, the processing speed is improved by increasing a clock frequency used in the charge transfer and thereby the time required for the charge transfer is reduced. According to the technique described in the above Japanese Laid Open Patent Application JP-P2001-244448A, the reduction of the charge transfer time is achieved without increasing the clock frequency by providing the CCD dedicated to the low resolution separately from the regular CCD for the normal use.